The invention relates to a method and a control device for controlling power semiconductor switches connected in parallel. Furthermore, the invention relates to an electrical system comprising the control device, a computer program for carrying out said method, and an electronic storage medium.
Inverters are usually used for operating electrical drives, said inverters converting the electrical energy from a DC voltage source, e.g. a battery, into an AC voltage, in order to supply an electrical machine, e.g. an asynchronous machine, with AC voltage or AC current. The inverter has so-called half-bridges for this purpose. Said half-bridges have power semiconductor switches, by means of which the DC current and the DC voltage are switched in a clocked fashion, such that an AC voltage and an AC current arise at the output terminals of the inverter. Upper limits of current are predefined for said power semiconductor switches, the power semiconductor switches being damaged irreversibly in the event of said upper limits being exceeded. If higher currents are required, then, for the operation of the electrical drive, said power semiconductor switches in the inverters are therefore connected in parallel. On account of component tolerances, however, the power semiconductor switches are loaded to different extents even during parallel operation, since the power semiconductor switches do not switch on simultaneously and, therefore, one of the power semiconductor switches possibly switches on earlier than another. The power semiconductor switch that switches the most rapidly and most sensitively thus bears a greater portion of the switch-on, switch-off and current-conducting losses. Consequently, the current flow between the switches is divided unequally among the power semiconductor switches. Individual power semiconductor switches are thermally loaded to a greater extent than others, age more rapidly and thus fail more rapidly. The maximum load current is therefore determined, if appropriate, by the thermal capacity of individual power semiconductor switches and not by the total current-carrying capacity thereof.
Besides the different switching times of the individual power semiconductor switches connected in parallel, the propagation time differences between the control signals should also be taken into account in the control. One method for minimizing the propagation time differences between the control signals in the control of power semiconductor switches connected in parallel is known from WO 2011/120728 A2.
Therefore, there is a need, for the operation of power semiconductor switches connected in parallel, to develop further solutions that enable a uniform loading of power semiconductor switches connected in parallel. This prevents individual power semiconductor switches from being overloaded and failing prematurely. The robustness of the entire system in which the power semiconductor switches connected in parallel are operated also increases as a consequence.